Control of power consumption in microprocessors is an important problem in the current technology. With the explosion of processing capacity in recent years, microprocessors are the key component of more and more end equipment. The increased usefulness of these devices has fueled consumer desire for further increased capacity. Many more devices including microprocessors are intended for portable applications where the device is powered by batteries. In these portable applications microprocessor power consumption is inversely proportional to the life between battery changes or recharges.
In general, the recent increase in computational capacity was achieved by operating the microprocessors at higher frequency rates or by operating more circuits in parallel. Both techniques tend to increase power consumption. Improvements in semiconductor manufacturing technology have reduced the size of individual semiconductor elements thereby permitting reductions in the electrical current consumed and the supply voltage required. These semiconductor manufacturing improvements have permitted the recent increase in processing capacity to take place at similar or lower power consumption levels. However, the rate of increasing demand for greater computational capacity in portable devices threatens to overtake the rate of manufacturing improvements. Thus any circuit or architectural techniques for reducing power consumption by microprocessors would be valuable.